SCPNMIF-Core
Deterministic phase synchronisation and hardware synthesis for high-beta pulsed magneto-inertial fusion plasmas on field-reversed configurations.
Sensor edge to guarded trigger
The present release connects kinematic models, diagnostics, scheduling, safety interlocks, and bit-true HDL paths without claiming the unfinished silicon timing result.
ADC normalisation, spike-rate quantisation, buffer decoding, and replay.
Doppler-Kuramoto synchronisation and UPDE remapping for pulsed FRC motion.
Lifecycle scheduling, bank dynamics, safety checks, and Petri-net control.
Clocked debounced single-shot logic with a registerless fast-veto lane.
Python/Verilator cosimulation, SymbiYosys safety/liveness proofs, and manifests.
Polyglot verification surface
Reference models and native hot paths with explicit fallback and cross-runtime contracts.
Synthesizable B-dot quantisation, trigger, and zero-cycle veto logic with self-checking traces.
Independent scientific lanes and DAQ replay, kept in parity with public contracts where applicable.
Safety and bookkeeping proofs for scheduling, capacitor dynamics, recovery, interlocks, and Petri nets.
Yosys, SymbiYosys, z3, and Verilator establish bounded safety, liveness, and bit-true equivalence evidence.
FUSION-owned physics kernels are detected through contracts, not silently reimplemented or dispatched locally.